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RT8259A 1 ds8259a-02 march 2011 www.richtek.com ordering information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. 1.5a, 24v, 1.4mhz step-down converter general description the RT8259A is a monolithic step-down switch mode converter with a built-in power mosfet. it achieves 1.5a output current over a wide input supply range with excellent load and line regulation. current mode operation provides fast transient response and eases loop stabilization. the chip also provides protection functions such as cycle-by- cycle current limiting and thermal shutdown protection. features z z z z z 1.5a output current z z z z z 0.3 internal power mosfet switch z z z z z stable with low esr output ceramic capacitors z z z z z up to 92% efficiency z z z z z fixed 1.4mhz frequency z z z z z thermal shutdown z z z z z cycle-by-cycle over current protection z z z z z wide 4.5v to 24v operating input range z z z z z output adjustable from 0.8v to 15v z z z z z available in sop-8 package z z z z z rohs compliant and halogen free applications z distributed power systems z battery charger z pre-regulator for linear regulators z wled drivers pin configurations (top view) phase 2 3 4 5 8 7 6 vin nc en boot nc gnd fb sop-8 typical application circuit figure 2. input voltage 5.5v to 24v figure 1. input voltage 4.5v to 5.5v package type s : sop-8 lead plating system g : green (halogen free and pb free) RT8259A vin en gnd boot fb phase 4 6 5 2 1 8 l1 4.7h cb 10nf c2 22f 6.3v r1 49.9k r2 16k v out 3.3v c1 10f/25v chip enable v in 5.5v to 24v RT8259A d1 b230a open = automatic startup vin en gnd boot fb phase 4 6 5 2 1 8 l1 4.7h cb 10nf c2 22f 6.3v r1 49.9k r2 16k v out 3.3v c1 10f/25v chip enable v in 4.5v to 5.5v RT8259A d1 b230a 1n4148 open = automatic startup
RT8259A 2 ds8259a-02 march 2011 www.richtek.com function block diagram functional pin description pin no. pin name pin function 1 phase switch output. 2 vin supply voltage. the rt8259 operates from a 4.5v to 24v unregulated input. c1 is needed to prevent large voltage spikes from appearing at the input. 3, 7 nc no internal connection. 4 en chip enable (active high). if the en pin is open, it will be pulled to high by internal circuit. 5 fb feedback. an external resistor divider from the output to gnd, tapped to the fb pins sets the output voltage. 6 gnd ground. this pin is the voltage reference for the regulated output voltage. for this reason, care must be taken in its layout. this node should be placed outside of the d1 to c1 ground path to prevent switching current spikes from inducing voltage noise into the part. 8 boot bootstrap. a capacitor is connected between phase and boot pins to form a floating supply across the power switch driver. this capacitor is needed to drive the power switch?s gate above the supply voltage. v out 1.2v 1.8v 2.5v 3.3v 5v 8v 10v 15v l1 ( h) 2 2 3.6 4.7 6.8 10 10 15 r2 (k ) 100 39 24 16 8.2 5.23 4.42 2.61 r1 (k ) 49.9 48.7 51 49.9 43 47 51 46.4 recommended component selection driver r q s bootstrap control + - ramp generator oscillator 1.4mhz + - pwm comparator ea reference regulator + - 1v 1a + - 400k 30pf 1pf shutdown comparator oc limit clamp current sense amp x20 25mohm boot gnd fb en vin phase 10k 3v
RT8259A 3 ds8259a-02 march 2011 www.richtek.com electrical characteristics parameter symbol test conditions min typ max u nit feedback voltage v fb 4.5v v in 24v 0.784 0.8 0.816 v feedback current i fb v fb = 0.8v -- 0.1 0.3 a switch on resistance r ds(on) -- 0.3 -- switch leakage v en = 0v, v sw = 0v -- -- 10 a current limit i lim v boot ? v phase = 4.5v 1.8 2.4 -- a oscillator frequency f sw 1.2 1.4 1.6 mhz maximum duty cycle -- 80 -- % minimum on-time t on -- 100 -- ns under voltage lockout threshold rising 3.9 4.2 4.5 v under voltage lockout threshold hysteresis -- 200 -- mv en input low voltage -- -- 0.4 v en input high voltage 1.4 -- 5.5 v en pull up current -- 1 -- a to be continued (v in = 12v, t a = 25 c unless otherwise specified) absolute maximum ratings (note 1) z supply voltage, v in ------------------------------------------------------------------------------------------------ 26v z phase v oltage ----------------------------------------------------------------------------------------------------- ? 0.3v to (v in + 0.3v) z boot v oltage ------------------------------------------------------------------------------------------------------- v phase + 6v z all other pins -------------------------------------------------------------------------------------------------------- 0.3v to 6 v z output voltage ------------------------------------------------------------------------------------------------------ ? 0.3v to 15v z power dissipation, p d @ t a = 25 c sop-8 ----------------------------------------------------------------------------------------------------------------- 0.833w z package thermal resistance (note 2) sop-8, ja ------------------------------------------------------------------------------------------------------------ 120 c/w z junction temperature ---------------------------------------------------------------------------------------------- 150 c z lead temperature (soldering, 10 sec.) ------------------------------------------------------------------------ 260 c z storage temperature range -------------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm (human body mode) ---------------------------------------------------------------------------------------- 2kv mm (machine mode) ----------------------------------------------------------------------------------------------- 200v recommended operating conditions (note 4) z supply voltage, v in ------------------------------------------------------------------------------------------------ 4.5v to 24v z output voltage, v out ---------------------------------------------------------------------------------------------- 0.8v to 15v z en voltage, v en ----------------------------------------------------------------------------------------------------- 0v to 5.5v z junction temperature range ------------------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range ------------------------------------------------------------------------------------- ? 40 c to 85 c
RT8259A 4 ds8259a-02 march 2011 www.richtek.com note 1. stresses listed as the above "absolute maximum ratings" may cause permanent damage to the device. these are for stress ratings. functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. note 2. ja is measured in the natural convection at t a = 25 c on a high effective four layers thermal conductivity test board of jedec 51-7 thermal measurement standard. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions. parameter symbol test conditions min typ max unit shutdown current i shdn v en = 0v -- 25 -- a quiescent current i q v en = 2v, v fb = 1v (not switching) -- 0.55 1 ma thermal shutdown t sd -- 150 -- c
RT8259A 5 ds8259a-02 march 2011 www.richtek.com reference voltage vs. input voltage 0.800 0.802 0.804 0.806 0.808 0.810 0.812 0.814 0.816 0.818 0.820 5 7.5 10 12.5 15 17.5 20 22.5 25 input voltage (v) reference voltage (v) typical operating characteristics efficiency vs. load current 0 10 20 30 40 50 60 70 80 90 100 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 load current (a) efficiency (%) v in = 12v v in = 24v v out = 3.3v efficiency vs. load current 0 10 20 30 40 50 60 70 80 90 100 0.10.30.50.70.91.11.31.5 load current (a) efficiency (%) v in = 12v v in = 24v v out = 5v output voltage vs. output current 3.27 3.28 3.29 3.30 3.31 3.32 3.33 3.34 0 0.25 0.5 0.75 1 1.25 1.5 output current (a) output voltage (v) v in = 12v v in = 24v output voltage vs. temperature 3.24 3.26 3.28 3.30 3.32 3.34 3.36 -50 -25 0 25 50 75 100 125 temperature output voltage (v) v in = 12v v in = 24v ( c) peak current limit vs. duty cycle 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 20406080100 duty cycle (%) current limit (a)
RT8259A 6 ds8259a-02 march 2011 www.richtek.com frequency vs. input voltage 1.20 1.25 1.30 1.35 1.40 1.45 1.50 1.55 1.60 5 7.5 10 12.5 15 17.5 20 22.5 25 input voltage (v) frequency (mhz) v out = 3.3v, i out = 0.3a quiescent current vs. input voltage 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 5 7.5 10 12.5 15 17.5 20 22.5 25 input voltage (v) quiescent current (ma) v en = 2v, v fb = 1v frequency vs. temperature 1.20 1.25 1.30 1.35 1.40 1.45 1.50 1.55 1.60 -50-250 255075100125 temperature (c) frequency (mhz ) v in = 12v, v out = 3.3v, i out = 0.3a quiescent current vs. temperature 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 -50 -25 0 25 50 75 100 125 temperature (c) quiescent current (ma ) v in = 12v v in = 24v v en = 2v, v fb = 1v load transient response time (100 s/div) i out (1a/div) v out (50mv/div) v in = 12v, v out = 3.3v, i out = 0.75a to 1.5a load transient response time (100 s/div) i out (1a/div) v out (50mv/div) v in = 12v, v out = 3.3v, i out = 0a to 1.5a
RT8259A 7 ds8259a-02 march 2011 www.richtek.com power on from en time (250 s/div) v out (1v/div) i in (500ma/div) v in = 12v, v out = 3.3v, i out = 1.5a v en (5v/div) power off from en time (100 s/div) v out (1v/div) i in (500ma/div) v in = 12v, v out = 3.3v, i out = 1.5a v en (5v/div) output ripple time (500ns/div) v lx (20v/div) i lx (1a/div) v in = 24v, v out = 3.3v, i out = 1.5a v out (5mv/div) output ripple time (500ns/div) v lx (10v/div) i lx (1a/div) v in = 12v, v out = 3.3v, i out = 1.5a v out (5mv/div)
RT8259A 8 ds8259a-02 march 2011 www.richtek.com c in and c out selection the input capacitance, c in, is needed to filter the trapezoidal current at the source of the top mosfet. to prevent large ripple current, a low esr input capacitor sized for the maximum rms current should be used. the rms current is given by : out in rms out(max) in out v v i = i 1 vv ? this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet size or height requirements in the design. the selection of c out is determined by the required effective series resistance (esr) to minimize voltage ripple. moreover, the amount of bulk capacitance is also a key for c out selection to ensure that the control loop is stable. loop stability can be checked by viewing the load transient response as described in a later section. the output ripple, v out , is determined by : out l out 1 viesr 8fc ?? ?? + ?? ?? the output ripple will be highest at maximum input voltage since i l increases with input voltage. multiple capacitors placed in parallel may be needed to meet the esr and out out l in vv i = 1 fl v ??? ? ?? ??? ? ??? ? having a lower ripple current reduces not only the esr losses in the output capacitors but also the output voltage ripple. high frequency with small ripple current can achieve highest efficiency operation. however, it requires a large inductor to achieve this goal. for the ripple current selection, the value of i l = 0.4(i max ) will be a reasonable starting point. the large st ripple current occurs at the highest v in . to guarantee that the ripple current stays below the specified maximum, the inductor value should be chosen according to the following equation : out out l(max) in(max) vv l = 1 fi v ??? ? ? ??? ? ??? ? inductor core selection the inductor type must be selected once the value for l is known. generally speaking, high efficiency converters can not afford the core loss found in low cost powdered iron cores. so, the more expensive ferrite or mollypermalloy cores will be a better choice. the selected inductance rather than the core size for a fixed inductor value is the key for actual core loss. as the inductance increases, core losses decrease. unfortunately, increase of the inductance requires more turns of wire and therefore the copper losses will increase. ferrite designs are preferred at high switching frequency due to the characteristics of very low core losses. so, design goals can focus on the reduction of copper loss and the saturation prevention. application information the typical application circuit shows the basic RT8259A application circuit. external component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by c in and c out . inductor selection the inductor value and operating frequency determine the ripple current according to a specific input and output voltage. the ripple current i l increases with higher v in and decreases with higher inductance. ferrite core material saturates ? hard ? , which means that inductance collapses abruptly when the peak design current is exceeded. the previous situation results in an abrupt increase in inductor ripple current and consequent output voltage ripple. do not allow the core to saturate! different core materials and shapes will change the size/ current and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy materials are small and do not radiate energy. however, they are usually more expensive than the similar powdered iron inductors. the rule for inductor choice mainly depends on the price vs. size requirement and any radiated field/emi requirements.
RT8259A 9 ds8259a-02 march 2011 www.richtek.com output voltage setting the resistive divider allows the fb pin to sense a fraction of the output voltage as shown in figure 4. rms current handling requirement. dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. special polymer capacitors offer very low esr value. however, it provides lower capacitance density than other types. although tantalum capacitors have the highest capacitance density, it is important to only use types that pass the surge test for use in switching power supplies. aluminum electrolytic capacitors have significantly higher esr. however, it can be used in cost-sensitive applications for ripple current rating and long term reliability considerations. ceramic capacitors have excellent low esr characteristics but can have a high voltage coefficient and audible piezoelectric effects. the high q of ceramic capacitors with trace inductance can also lead to significant ringing. higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. however, care must be taken when these capacitors are used at input and output. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, v in . at best, this ringing can couple to the output and be mistaken as loop instability. at worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at v in large enough to damage the part. external bootstrap diode when the operating input voltage is lower than 5.5v, it is recommended to add an external bootstrap diode for efficiency improvement. the bootstrap diode can be a low cost one such as in4148 or bat54. for higher operating input voltage between 5.5v and 24v, the external diode must be removed. figure 4. setting the output voltage RT8259A gnd fb r1 r2 v out for adjustable voltage mode, the output voltage is set by an external resistive divider according to the following equation : out ref r1 v = v 1 r2 ?? + ?? ?? figure 3 phase boot 4.5v to 5.5v v in RT8259A 10nf where v ref is the internal reference voltage (0.8v typ.). checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in load current. when a load step occurs, v out immediately shifts by an amount equal to i load (esr) also begins to charge or discharge c out generating a feedback error signal for the regulator to return v out to its steady-state value. during this recovery time, v out can be monitored for overshoot or ringing that would indicate a stability problem. thermal considerations for continuous operation, do not exceed the maximum operation junction temperature 125 c. the maximum power dissipation depends on the thermal resistance of ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : p d(max) = ( t j(max) - t a ) / ja where t j(max) is the maximum operation junction temperature 125 c, t a is the ambient temperature and the ja is the junction to ambient thermal resistance. for recommended operating conditions specification of RT8259A, where t j(max) is the maximum junction temperature of the die (125 c) and t a is the maximum
RT8259A 10 ds8259a-02 march 2011 www.richtek.com layout consideration follow the pcb layout guidelines for optimal performance of RT8259A } keep the traces of the main current paths as short and wide as possible. } put the input capacitor as close as possible to the device pins (vin and gnd). } lx node is with high frequency voltage swing and should be kept small area. keep analog components away from lx node to prevent stray capacitive noise pick-up. } connect feedback network behind the output capacitors. keep the loop area small. place the feedback components near the RT8259A. } connect all analog grounds to a command node and then connect the command node to the power ground behind the output capacitors. } an example of pcb layout guide is shown in figure 6 for reference. table 2. suggested capacitors for cin and cout component supplier series inductance ( m h) dcr (m w ) current rating (a) dimensions (mm) tdk slf7045 4.7 30 2 7x7x4.5 taiyo yuden nr8040 4.7 18 4.7 8x8x4 goternd gtsd53 4.7 45 1.87 5x5x2.8 goternd gssr2 4.7 18 5.7 10x10x3.8 table 1. suggested inductors for l1 component supplier series v rrm (v) i out (a) package diodes b230a 30 2 do-214ac diodes b330a 30 3 do-214ac panjit sk23 30 2 do-214ac panjit sk33 30 3 do - 214ab table 3. suggested diode for d1 figure 5. derating curves for RT8259A packages ambient temperature. the junction to ambient thermal resistance q ja is layout dependent. for sop-8 package, the thermal resistance q ja is 120 c/w on standard jedec 51-7 four-layers thermal test board. the maximum power dissipation at t a = 25 c can be calculated by following formula : p d(max) = (125 c -25 c) / 120 c/w = 0.833w (sop-8) the maximum power dissipation depends on operating ambient temperature for fixed t j(max) and thermal resistance q ja . for RT8259A packages, the figure 5 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. component supplier part no. capacitance ( m f) case size murata grm31cr61e106k 10 1206 tdk c3225x5r1e106k 10 1206 taiyo yuden tmk316bj106ml 10 1206 murata grm31cr61c226m 22 1206 tdk c3225x5r1c226m 22 1206 taiyo yuden emk316bj226ml 22 1206 0.0 0.2 0.4 0.6 0.8 1.0 0 25 50 75 100 125 ambient temperature ( c) maximum power dissipation (w) 1 four layer pcb phase 2 3 4 5 8 7 6 vin nc en boot nc gnd fb v out v out v in gnd c out l1 d1 c in cb d2 r1 r2 figure 6
RT8259A 11 ds8259a-02 march 2011 www.richtek.com information that is provided by richtek technology corporation is believed to be accurate and reliable. richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. no third party intellectual property infringement of the applications should be guaranteed by users when integrating richtek products into any application. no legal responsibility for any said applications is assumed by richtek. richtek technology corporation headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 richtek technology corporation taipei office (marketing) 5f, no. 95, minchiuan road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)86672399 fax: (8862)86672377 email: marketing@richtek.com outline dimension a b j f h m c d i 8-lead sop plastic package dimensions in millimeters dimensions in inches symbol min max min max a 4.801 5.004 0.189 0.197 b 3.810 3.988 0.150 0.157 c 1.346 1.753 0.053 0.069 d 0.330 0.508 0.013 0.020 f 1.194 1.346 0.047 0.053 h 0.170 0.254 0.007 0.010 i 0.050 0.254 0.002 0.010 j 5.791 6.200 0.228 0.244 m 0.400 1.270 0.016 0.050

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